A Neural Recording Analog Front-End with Exponentially Tunable Pseudo Resistors and On-Chip Digital Frequency Calibration Loop Achieving 3.4% Deviation of High-Pass Cutoff Frequency in 5-to-500 Hz Range

Abstract

State-of-the-art capacitively-coupled analog front-end (AFE), which acquire the different frequency band neural signals by adjusting the high-pass cutoff frequency <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\mathrm{f}_{\text{HP}})$</tex> , necessitates a tunable gigaohm-level (GO-level) resistor with feedback capacitor to form <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{f}_{\text{HP}}$</tex> . In recent advances [1]–[6], as shown in Fig. 1, there are four means to emulate a GO-level on-chip resistor: 1) conventional pseudo resistor (PR) [1], 2) switched-capacitor resistor (SCR) [2], 3) duty-cycled resistor (DCR) [3], and 4) tunable PR [4]–[6]. By connecting two back-to-back transistors operating in subthreshold region, conventional PR easily realizes the resistance with hundreds of GΩ, but its value varies with PVT over several orders of magnitude. On the contrary, DCR is less sensitive to PVT because its resistance mainly depends on the duty cycle of the clock. However, the maximal achievable resistance of DCR is limited to dozens of GΩ due to the parasitic capacitor. Also, DCR needs an anti-alias filter [2] to avoid noise increasing. A similar dilemma occurring in SCR, although [3] utilizes an SC circuit to attain hundreds-of-GΩ resistance to make the resistor insusceptible to PVT, nonetheless, noise aliasing is a problematic issue to circuit performance in like manner. Compared to DCR and SCR, the tunable PRs proposed in [4]–[6] circumvent noise aliasing due to continuous-time operation. However, to realize a resistor with hundreds of GO, a few picoamperes (pA) bias current <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\mathrm{I}_{\text{BIAS}})$</tex> are required to generate very low V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</inf> in circuit implementation. It is no doubt that a large deviation of resistance of PR will appear due to leakage current. Moreover, to realize the finely tuning of PR in the vicinity of hundreds-of-GΩ resistance, a few picoamperes (pA) bias current with 1 pA adjustment precision may be required, thus, the accuracy of tunable PR is further worsened.