A multiple microprocessor system for biomedical signal processing

Abstract

This paper presents a detailed description of the organization and design of a multiple-microprocessor computer based on TMS9900 microprocessors. The machine is organized around a shared bus with each processor having access to local memory. Details are given of the addressing structure used, the shared bus arbitration scheme and associated logic and the facilities for processor synchronization. The shared memory/local memory partition is defined at the processor level. Arbitration is based on circular polling of shared memory requests. Processor synchronization is effected by a hardware implemented test and set busy flag memory cycle. A low-level operating system for the multiple microprocessor computer is discussed. Application of this system to the real-time analysis of electromyograms (EMG) is explored. It is concluded that this system demonstrates the simplicity of a small-scale multiple-microprocessor computer, its applicability and potential ease of application to biomedical signal processing problems.