Abstract

AbstractThis paper presents a multi‐mode phase shifter in CMOS technology for S‐band phased array antenna with gain control modes depending on system requirement. The proposed phase shifter consists of 6‐bit phase shifter with DPDT, which provides full phase control range of 354° with the LSB of 5.625° and two distributed amplifiers (DAs). The proposed phase shifter operates four different gain modes (high‐gain mode, two mid‐gain modes, and bypass mode). Also, two mid‐gain modes are differently implemented by position of the distributed amplifier in TX/RX architecture. When the distributed amplifier is at the output, the phase shifter is in Tx mode. In contrast, the phase shifter is in Rx mode when the distributed amplifier is at input. The measured gains are 14 dB (HGM), 2 dB (MGMtx/MGMrx), and −10 dB (BPM) by gain controlling. The proposed phase shifter has the maximum RMS phase error of 2.5° and amplitude variation of 0.8 dB from 1.6 to 2.6 GHz, respectively. The measured output 1‐dB compression points (OP1dBs) are 7.5, 6.5, −5.5, and −6 dBm, and input 1‐dB compression points (IP1dBs) are −5 and 5 dBm at 2.4 GHz. The chip size is 2.5 × 1.5 mm2, including pads. The phase shifter consumes 40 mA from a 2.4 V DC supply.

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