A Model of Fringing Fields in Short-Channel Planar and Triple-Gate SOI MOSFETs

Abstract

The fringing fields induced by the drain and the source through the buried oxide (BOX) and substrate of short-channel silicon-on-insulator (SOI) MOSFETs cause a lowering of the threshold voltage. A physics-based model of the lateral coupling between the drain and the front channel is proposed. This simple 2-D model is based on conformal mapping and provides an accurate analytical description of the electrostatic potential in the BOX and particularly at the back interface (film BOX). The model includes the substrate-depletion effect. The main interest of the fringing field modeling is the optimization of the device dimensions and architecture (BOX thickness versus channel length, substrate doping, etc.) in sub-100-nm CMOS generations. This model can be used to evaluate the scalability of various architectures like fully depleted SOI, ground-plane MOSFET, double-gate MOSFET, and SOI on low-k BOX. It is also useful for the compact modeling of the body factor and the short-channel effects. The model is universal and naturally extends to the 3-D case of FinFET and triple-gate architectures. The coupling between the lateral gates through the BOX in narrow FinFET-like devices is shown to dominate the drain-to-body or the substrate-to-body coupling.