Abstract
The aim of this paper is to propose a microsequencer architecture and supporting firmware that are suitable for implementing modular microprogramming. The structure consists of a PLA sequencer store, a microcode store (memory) and an address processor. The latter, operating under sequencing commands issued by the PLA, generates the effective address for both stores. The supporting firmware primitives or transactions, stored in PLA, are suitable for structured microprogramming constructs, e.g., while-do, if-then-else, etc. This capability is extended to complex sequencing structures which are then implemented by context-free transaction blocks. Such sequencing is required to achieve migration of complicated. software functions, such as operating systems, in firmware. It is expected that the proposed method is compatible with LSI/VLSI array technology.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
