A method for generating structurally aligned grids for semiconductor device simulation

Abstract

The quality of the numeric approximation of the partial differential equations governing carrier transport in semiconductor devices depends particularly on the grid. The method of choice is to use structurally aligned grids since the regions and directions therein that determine device behavior are usually straightforward to find as they depend on the distribution of doping. Here, the authors present an algorithm for generating structurally aligned grids including anisotropy with resolutions varying over several orders of magnitude. The algorithm is based on a level set approach and permits to define the refined resolutions in a flexible manner as a function of doping. Furthermore, criteria on grid quality can be enforced. In order to show the practicability of this method, the authors study the examples of a trench gate metal-oxide-semiconductor field-effect transistor (TMOSFET) and a radio frequency silicon-on-insulator lateral double diffused metal-oxide-semiconductor (RF SOI LDMOS) power device using the device simulator MINIMOS NT, where simulations are performed on a grid generated by the new algorithm. In order to resolve the interesting regions of the TMOSFET and the RF SOI LDMOS power device accurately, several regions of refinement were defined where the grid was grown with varying resolutions.