A Matching Outputs Approach to Evolutionary Design of Polymorphic Self-Checking Circuits

Abstract

In order to solve the problem of losing optimum structure in the stage of fitness evaluation, a matching outputs approach to evolutionary design of polymorphic self-checking circuits is proposed in this paper. By adding NOT gate to outputs of the candidate circuits, the fitness and the diversity of the population are increased when the matching degree of the output is lower than 1/2. The experiments of evolutionary design for 1-bit self-checking adder are conducted by combining the polymorphic gates with conventional gates. Experimental results show that the proposed method can detect all the stuck-at-faults. The generation of evolution is decreased by 28% to 32% compared with ordinary method in designing polymorphic self-checking circuits. The proposed method enjoys advantages of faster convergence and less iteration.