Abstract
The authors describe the development of a high throughput interlevel dielectric (ILD) deposition process yielding a high quality silicon oxide film for ILD gap fill using electron cyclotron resonance (ECR) technology. A process has been developed with biased ECR CVD to gap fill metal spaces of 0.5 mu m with aspect ratios as high as 2.6 at deposition rates of approximately 6000 A/min. The effect of various ECR CVD parameters on film quality, oxide deposition rate, and ILD gap fill are explored. High silane flowrates yield high deposition rates, while low oxygen/silane ratios decrease stress and -OH content in the film. ILD gap fill of the ECR CVD process improves as RF bias increases. >
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
