Abstract

The growing needs of emerging big data applications has posed significant challenges for the design of optimized manycore systems. Network-on-Chip (NoC) enables the integration of a large number of processing elements (PEs) in a single die. To design optimized manycore systems, we need to establish suitable trade-offs among multiple objectives including power, performance, and thermal. Therefore, we consider multi-objective design space exploration problems arising in the design of NoC-enabled manycore systems: placement of PEs and communication links to optimize two or more objectives (e.g., latency, energy, and throughput). Existing algorithms suffer from scalability and accuracy challenges as size of the design space and the number of objectives grow. In this paper, we propose a novel framework referred as Guided Design Space Exploration (Guided-DSE) that performs adaptive design space exploration using a data-driven model to improve the speed and accuracy of multi-objective design optimization process. We provide two concrete instantiations of guided-DSE and present results to show their efficacy for designing 3D heterogeneous manycore systems.

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