Abstract

The two-transistor CMOS current reuse VCO is modified with the addition of an ac-coupling capacitor to reduce the supply voltage and achieve good phase noise with very low power consumption. A 2.17-2.9GHz prototype VCO operates with a supply voltage as low as 0.6V. At 2.53GHz, with a 0.7V supply and a 185μW power consumption, the measured phase noise at 3MHz offset is -122.6dBc/Hz and varies by only 2.2dB over a temperature range from -30 to 120°C. For a 0.85V supply, phase noise is improved to -126.1dBc/Hz with a 280μW power consumption which corresponds to a Figure of Merit (FoM) of 190.2dB. This is the lowest reported power consumption and supply voltage for any current reuse VCO. Fabricated in 65nm CMOS, the prototype occupies 0.13mm2.

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