A low‐power voltage‐controlled oscillator with phase noise suppressing techniques

Abstract

AbstractA 0.5‐V low‐power VCO by using TSMC 0.18‐μm CMOS process has been proposed. For achieving low phase noise and low power consumption, several techniques have been utilized. The forward body biasing technique can lower the supply voltage and power consumption. The noise filtering, feedback capacitors, and switched biasing technique can reduce the phase noise and power consumption. The PMOS transistors, which has lower flicker noise than the NMOS transistors, are used for further lowering the phase noise. The body‐controlled cross‐coupled pair is proposed for choosing the oscillation frequencies without using additional varactors, which lower the oscillation signal loss and phase noise. The measured results show the phase noise at 1 MHz offset frequency from the carrier signal is −118.6 dBc/Hz with 1/f3 corner frequency of 230 kHz while the control voltage is 0 V. The frequency tuning range is from 2.4 to 2.46 GHz under power consumption from 0.5 to 0.8 mW. The figure of merit at 1 MHz offset frequency from the carrier signal is −189 dBc/Hz.