A low-voltage MOS translinear loop, biased using FVF and its applications in realizing square-rooter and squarer circuits

Abstract

In this paper, a new MOS Translinear Loop (MTL), biased using Flipped-Voltage-Follower, has been presented and its use in the CMOS Current-Mode (CM) realization of the non-linear functional circuits namely, square-rooting and squaring has been demonstrated. The new MTL facilitates the low-voltage operation of the proposed CMOS CM circuits while maintaining all the MOSFETs operating in strong inversion mode. The workability of both the proposed circuits has been validated by simulations carried out on Cadence Virtuoso software using 0.18 μm CMOS technology at a DC power supply voltage of 0.85 V and the results of the same have been presented. Furthermore, temperature and corner analyses have been performed to verify the robustness of the proposed circuits in the practical environment.