Abstract

This paper describes a novel circuit design technique for a low-voltage CMOS operational transconductance amplifier (OTA) where the output current versus the input voltage relationship is linear for differential input voltage range extended from rail to rail. The input transconducting CMOS transistors operate in the nonsaturation region. A pair of complementary n-type input OTAN and p-type OTAP circuits in conjunction with n-MOS and p-MOS output current mirrors are connected in parallel to implement the rail-to-rail voltage input and push-pull current output. The transconductances g/sub mn/ and g/sub mp/ of the OTAN and the OTAP are tuned by biasing voltages VDSN and VDSP, respectively. A masterbias generator (with VDSP as input) is used to generate VDSN as output so as to satisfy g/sub mn/=g/sub mp/. The circuit is capable of operating at supply voltage larger than two times the MOS transistor threshold voltage V/sub T/. When the supply voltage is 2 V and the MOS transistor threshold voltage is 0.7 V, using SPICE level-3 2 /spl mu/m CMOS technology device parameters, the simulation result of the output current deviation from perfect linearity is less than 0.3% for rail-to-rail differential input voltage range.

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