A low temperature co-fired ceramic land grid array for high speed digital applications

Abstract

A Land Grid Array (LGA) package was designed and fabricated to utilize specific materials and design concepts for high speed operation. The performance of this LGA was compared with that of a functionally and dimensionally equivalent Pin Grid Array (PGA) that is currently being used to package high speed silicon ECL gate arrays. Two structures that were sources of signal degradation in the PGA, the pins and a layer of plating lines, were eliminated in the design of the LGA. The package was fabricated out of Du Pont Green Tape low temperature co-fired ceramic (LTCC) with gold conductors and vias. This combination of an improved LGA, structure and materials with superior high speed properties resulted in a package with improved performance and decreased signal degradation when compared with conventional high temperature co-fired ceramic (HTCC) PGAs. Time domain reflectometry measurements of the LGA, when compared with those of the equivalent PGA, showed less than half the deviation from a 50 /spl Omega/ characteristic impedance. A 'package risetime' performance factor, which describes the contribution the package makes to the output risetime, was calculated from time domain transmission (TDT) data. These results also showed significantly improved performance in the LGA. For the best line in the LGA, the package risetime was 104 ps, which is a 98% improvement over the equivalent line in the PGA. A ground delay effect due to the separation between the signal I/O and nearest ground I/O was observed. This effect, which increased with increasing signal-nearest ground I/O spacing, was seen to cause significant degradation and increased risetimes that should be avoided in high speed packages.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>