A low power UWB CMOS low noise amplifier for 3.1–10.6 GHz in receivers

Abstract

An ultra-wideband (UWB) low noise amplifier (LNA) with low power is presented in this paper. The proposed circuit is common gate and cascode topology that the power consumption, input and output impedance matching are optimized. Simulation results show that maximum gain and noise figure are 22.1dB and 2.4–2.9dB over a 3.1–10.6 GHz, respectively. Power consumption of the LNA core, buffer power and IIP3 are 7.7mW, 1.3 mW with 1.8 V supply and −9dBm respectively. The wideband input impedance matching of LNA is obtained by employing a degenerating inductor (|S 11 |<−7.5 dB). The circuit proposed UWB LNA is implemented using 0.18 µm based CMOS technology under TSMC.