A low power register file with asynchronously controlled read-isolation and software-directed write-discarding

Abstract

The register file (RF) consumes a large portion of power and is often a hotspot in microprocessor. In this paper, we propose and exploit several approaches to reducing both read and write access frequency to RF to reduce its power consumption and power density. Asynchronously controlled read-isolation is inserted in D Stage to prevent unused RF read access, triggered by a custom designed local asynchronous clock network, without changing the pipeline architecture and critical path. Software-directed write-discarding adopts static speculation algorithms to exploit short-lived values and determine their lifetime, with architectural supports to discard unnecessary writeback. Our approaches reduce RF access frequency by 27% for read and 50% for write, respectively. Moreover, 37% of RF power is eliminated with negligible overhead in area and almost no impact on the performance.