A low-power low-offset charge-sharing technique for double-tail comparators

Abstract

A charge sharing technique for high-speed double-tail comparators is presented. This technique is applied to the pre-amplifier stage of the dynamic comparators so that the maximum differential gain is applied to the latch during the latching process reducing the input referred offset voltage. In dynamic comparators a large portion of the input referred offset voltage is coming from the latch, and the proposed technique is introduced to alleviate this issue. Monte- Carlo simulations show that the proposed technique reduces the offset voltage from 16 ​mV to 8 ​mV. Due to the charge sharing technique, the pre-amplifier draws just enough power for its operation reducing the average power by 40% compared to the conventional comparator. Therefore, the proposed charge sharing technique considerably reduces the offset voltage and power consumption while the speed is better in the whole range of the input common mode voltage.