A Low Power Hybrid CMOS-Memristor based Ring Oscillator for Hardware Security Applications

Abstract

This paper proposes implementation of a low power hybrid CMOS-Memristor Ring Oscillator (RO), with a higher randomness value compared to existing technologies. A comparison of conventional CMOS inverter, memristive load inverter and a two memristor inverter based RO is done in terms of frequency of oscillation, power consumption and the randomness in oscillation frequency. Memristors because of their non-volatile nature, compatibility with CMOS technology and low area and power consumption are being widely used for low power VLSI design. This concept is well supported with the simulation results. Randomness for the proposed two memristor based RO is found to be $51.16\mu$ which is 2.065x and 1.596x of the CMOS based RO and memristive load based RO respectively. The power consumption of the circuit is highly improved. Maximum power of the design is reported as $270\mu\mathrm{W}$ which is 86.4% and 35.25% lesser than that of the CMOS and memristive load based designs respectively.