A low power automatic gain control loop for a receiver

Abstract

This paper proposes a new structure to lower the power consumption of a variable gain amplifier (VGA) and keep the linearity of the VGA unchanged. The structure is used in a high rate amplitude-shift keying (ASK) based IF-stage. It includes an automatic gain control (AGC) loop and ASK demodulator. The AGC mainly consists of six-stage VGAs. The IF-stage is realized in 0.18 μm CMOS technology. The measurement results show that the power consumption of the whole system is very low. The system consumes 730 μA while operating at 1.8 V. The minimum ASK signal the system could detect is 0.7 mV (peak to peak amplitude).