A low power 0.5–3.0 GHz passive mixer based wideband receiver front-end

Abstract

A 0.5–3.0 GHz passive mixer based receiver front-end (RFE) is presented. This RFE consists of low noise amplifier, passive mixer, transimpedance amplifier (TIA) and local oscillator signal generator. In order to reduce the power consumption and noise figure, an optimized LNA is proposed in this paper. To further reduce the power consumption, topology of TIA is simplified. The chip is fabricated with SMIC 65 nm technology. At the frequency band of 0.5–3.0 GHz, it achieves a gain of 34 dB and NF of 3.2 dB. The power consumption is 3.8–5.0 mW with core area of 0.06 mm2.