Abstract
A 0.5–3.0 GHz passive mixer based receiver front-end (RFE) is presented. This RFE consists of low noise amplifier, passive mixer, transimpedance amplifier (TIA) and local oscillator signal generator. In order to reduce the power consumption and noise figure, an optimized LNA is proposed in this paper. To further reduce the power consumption, topology of TIA is simplified. The chip is fabricated with SMIC 65 nm technology. At the frequency band of 0.5–3.0 GHz, it achieves a gain of 34 dB and NF of 3.2 dB. The power consumption is 3.8–5.0 mW with core area of 0.06 mm2.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
