Abstract
A programmable gain amplifier (PGA) is presented, targeting amplifying input signal with high dynamic range and low noise. The proposed PGA adopts fully balanced differential difference amplifier (FBDDA) as main amplifier. A class-AB implementation of output stage is advantageous in order to achieve high current driving capability with very low quiescent power consumption. Combining resistor-feedback loop controlled by digital signal, the proposed PGA achieves a dB-linear gain range from 0 to 15dB with a gain step of 1dB. Compared with previous works, the theoretical analysis and measurement results prove that the proposed structure has lower noise. The circuit was designed and fabricated in SMIC 0.18µm 3.3V process, showing a gain error of less than 0.25dB, a third harmonic distortion (HD3) of better than −83dB and a thermal noise of 1.6 nv/Hz. The measurement results indicate that the PGA described here has a −3dB bandwidth of 387.5MHz at maximum gain of 15dB. The PGA occupies a chip area of 0.1mm2.
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