A low noise CMOS instrumentation amplifier for TMR-effect-based magnetic sensors

Abstract

This paper presents a low [Formula: see text] noise CMOS single-ended output instrumentation amplifier (IA) for tunneling magnetic resistance (TMR) sensors. For high DC gain and linearity, the amplifier employs three-stage current-feedback topology. For high CMRR and PSRR, the first two stages employ fully differential input. To maintain stability and lower the power dissipation, the amplifier employs trans-conductance with capacitance feedback compensation (TCFC) topology. The amplifier employs chopping technology and continuous-time AC-coupled ripple reduction loop to reduce [Formula: see text] noise and chopping ripple. The whole chip is fabricated using 0.35 [Formula: see text]m CMOS-BCD technology and the total area is 1 mm2. Test result shows an input-referred noise power spectral density (PSD) of 14 nV/[Formula: see text] is achieved with 1 Hz [Formula: see text] corner. The bandwidth is larger than 50 kHz [Formula: see text] with 20 pF load capacitor. The total current is 300 [Formula: see text]A at 5 V supply.