A Low Noise Amplifier for Neural Spike Recording Interfaces.

Jesus Ruiz-Amaya,Manuel Delgado-Restituto,Alberto Rodriguez-Perez

doi:10.3390/s151025313

Jesus Ruiz-Amaya, Manuel Delgado-Restituto + Show 1 more

Open Access

https://doi.org/10.3390/s151025313

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Abstract

This paper presents a Low Noise Amplifier (LNA) for neural spike recording applications. The proposed topology, based on a capacitive feedback network using a two-stage OTA, efficiently solves the triple trade-off between power, area and noise. Additionally, this work introduces a novel transistor-level synthesis methodology for LNAs tailored for the minimization of their noise efficiency factor under area and noise constraints. The proposed LNA has been implemented in a 130 nm CMOS technology and occupies 0.053 mm-sq. Experimental results show that the LNA offers a noise efficiency factor of 2.16 and an input referred noise of 3.8 μVrms for 1.2 V power supply. It provides a gain of 46 dB over a nominal bandwidth of 192 Hz–7.4 kHz and consumes 1.92 μW. The performance of the proposed LNA has been validated through in vivo experiments with animal models.

Highlights

IntroductionThere has been a growing interest on the design of implanted neural recording interfaces for the monitoring of brain activity [1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21]
Assuming the same Operational Transconductance Amplifier (OTA) parameters than in the Miller Compensated Capacitive Feedback Network (MCCFN) topology, the most suitable Low Noise Amplifiers (LNA) for Noise Efficiency Factor (N EF) reduction reviewed in Section 2, the proposed Feedforward Compensated Capacitive feedback network (FCCFN) approach is able to further reduce the noise efficiency factor by about 15%
A prototype of the FCCFN LNA, with the sizes detailed in Table 3, has been fabricated in a 130 nm standard 2P6M CMOS technology

Summary

Introduction

There has been a growing interest on the design of implanted neural recording interfaces for the monitoring of brain activity [1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21]. A large population of neurons has to be simultaneously monitored in these applications (in some recent implementations around 500 recording sensors are used [25]), leading to highly complex circuit solutions. In spite of this complexity, neural prosthesis has to exhibit low Sensors 2015, 15 power consumption, in order to avoid excessive heating of the brain tissue [26], and preserve a small form factor. A typical recording sensor is composed by a microelectrode to capture the neural activity, followed by a Low Noise Amplifiers (LNA), a Programmable Gain Amplifier (PGA), and an Analogue-to-Digital Converter (ADC) to digitize the acquired data for further profcessing.

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Conclusion