Abstract

This paper describes the design of a current-mode interface ASIC for Silicon Photomultiplier (SiPM) arrays. The target application is positron emission tomography (PET) imaging front-ends. The channel architecture comprises: 1) a low input impedance Transimpedance amplifier (TIA) which interfaces with a SiPM array, 2) a programmable gain stage to amplify the TIA output signals and 3) output buffers to drive the off-chip digitizers. The prototype chip occupies an area of 4 mm2 in TSMC 65nm Low Power process and has 32 readout channels. The front-end TIA architecture has been optimized to be power and area efficient as compared to prior art using Regulated Cascode (RGC) current buffer. The input impedance of the channel is measured to be 14 ohms at 500 MHz. The channel bandwidth is 150 MHz. The prototype chip was characterized with a test setup which was interfaced with a Hamamatsu SiPM device in the presence of a 511 KeV Ge-68 radiation source. The energy resolution was measured to be 12 % FWHM. Over the coming months, the chip will be interfaced with SiPM arrays to evaluate its performance in a Medical Imaging setup. Future versions of the described chip will include integrated digitizing elements.

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