A low damage RIE process for the fabrication of compound semiconductor based transistors with sub-100 nm tungsten gates

Abstract

This paper investigates reactive ion etching (RIE) of sputtered tungsten films, a suitable candidate for gate metallization in compound semiconductor based high mobility channel devices, with the aim of developing a detailed understanding of the effects of etching parameters vital to reducing etch-induced damage and improving etching performance, yield, uniformity and repeatability. An Oxford Instruments PlasmaLab System 100 RIE etch tool and SF 6 based chemistry in combination with various functional gases, such as N 2, O 2 and CHF 3 was used in this study. To evaluate plasma-induced damage caused by the RIE process, GaAs based HEMT (high electron mobility transistor) type layer structures with channels buried 18 nm from the surface were grown by molecular beam epitaxy (MBE). Subsequently, Van der Pauw structures were fabricated on this material and used to assess the effects of the RIE process on sheet resistivity, carrier concentration and mobility in the device channel. Etched tungsten line widths down to 25 nm were obtained by electron beam lithography with Sumitomo NEB31 resist as an etch mask. The effects of etching gases of SF 6 + N 2, SF 6 + O 2, and SF 6 + CHF 3, RF power, and etching temperature on etching profile and etching-induced damage were investigated.