Abstract
Lightly-doped drain-offset polysilicon thin film transistors (LDO-TFTs) are very attractive as low leakage load elements in CMOS Static Random Access Memory (SRAM) cells. LDO-TFTs with different offset lengths and doses were fabricated and characterized. A model based on the Poole-Frenkel effect and thermionic field emission was developed to account for the leakage mechanism. The model was then applied to determine the sensitivity of the leakage current to process variations. It was found that the two most important factors influencing the leakage current are the net dose in the offset region and the distance between the channel/drain junction and the sidewall oxide.
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