A K-band GaAs FET with 2.5 dB noise figure at 18 GHz

Abstract

Low Noise GaAs FETs were fabricated on an active layer produced by implantation into a semi-insulating substrate. Silicon was implanted at relatively low energy to give a very shallow, steep profile. The extremely low noise figure was achieved as a result of the high mobility near pinchoff and fabrication optimization. With the high mobility at the interface, transconductance remains high down to I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ds</inf> less than 10% of I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dss</inf> . Two half micron gate length geometries were used with gate widths of 150 and 300 microns. The best noise figure obtained from the 150 micron gate device to date is 2.75 dB. The 2.5 dB noise figure with associated gain of 7 dB at 18 GHz was obtained from the 300 micron gate device. The device characterization and optimization will be discussed.