Abstract

A fully integrated Ka band frequency modulation continuous wave single-chip radar transceiver front-end is proposed in 65-nm CMOS technology. By utilizing VCO with multi-biasing varactor banks, the critical bandwidth and linearity have been improved. To address the challenges of losses and complexities in local oscillator (LO) distribution chain, a three-way transformer-based power divider is proposed and implemented to split the input differential signals to three outputs, in three orthogonal directions. The poly phase filter is also used to obtain the in-phase and quadrature LO signals. To minimize the reflections between the poly phase filter and the following stages, a 1:2 transformer is inserted to provide sufficient matching. For the receiver part, differential cascode amplifier with neutralization capacitors is implemented in the low noise amplifier to obtain gain and stability. By utilizing double balanced passive mixers, noise performances of I/Q paths are improved at low intermediate frequency. The transceiver demonstrates 4.4-dBm output power, 2-GHz bandwidth with 7.5-cm range resolution, and 5.9–7.5 dB double side band noise figure at 4 MHz. The whole transceiver front-end consumes 132 mW from 1.2 V and 2.16 mm2 die size.

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