Abstract
A fully integrated Ka band FMCW single-chip radar transceiver front-end is proposed in 65nm CMOS technology. By utilizing VCO with multi-biasing varactor banks, the critical bandwidth and linearity have been improved. To address the challenges of losses and complexities in LO distribution chain, a three-way power divider using distributed active transformer is proposed and implemented to split the input differential signals to three differential ones. The transceiver demonstrates 4.4 dBm output power, 2 GHz bandwidth with 7.5 cm range resolution, 5.9-7.5 dB double side band noise figure at 4 MHz, and less than 10.2 dB NF at 10 kHz. The whole transceiver front-end consumes 132 mW from 1.2V and 2.16 mm2 die size.
Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
