A junction temperature model based on heat flow distribution in an IGBT module with solder layer voids

Abstract

The presence of voids in a solder layer affects the thermal reliability of an insulated-gate bipolar transistor (IGBT). In this work, the effects of the size and fraction of solder layer voids and the power losses of chips on heat flow distribution, junction temperature and thermal resistance were investigated. It was found that it was difficult for the heat to flow through the voids due to the high thermal resistance of air. Therefore, the heat above the voids could only flow horizontally, and then avoid the voids and move downward in the solder layer and the following layers, leading to a temperature difference in the surface chip layer. An improved junction temperature model based on the heat flow distribution (HD) considering the solder layer voids was established, the horizontal thermal resistance and horizontal heat capacity are introduced to characterize the effect of the solder layer voids, and the parameter extraction method was proposed. The temperature difference on the surface of the module increased with the increase of the void fraction, and when the void fraction increased from 0 % to 40 %, the surface temperature difference increased from 9.591 °C to 109.86 °C. The results showed that the proposed model not only had a higher accuracy in the estimation of the junction temperature compared with the traditional Cauer model and the improved Cauer model, but also monitored the horizontal temperature differences in the chip layer precisely.