A hyperdistributed switching system architecture for B-ISDN

Abstract

The broadband integrated services digital network (B-ISDN) is expected to realize a high-speed network. Information with diversified classes of quality must be transmitted on the network, from the 64-kbit/s voice signal to the several tens Mbit/s video signal. Another aspect is that the voice and the video signals are sensitive to the delay, and severe requirements are imposed on the data error. For the switching system in B-ISDN, an architecture is required which fully utilizes the advantages of the asynchronous transfer mode (ATM) communication system, where the effective use of the network is considered by multiplexing the multimedia. This paper proposes the hyperdistributed architecture to be applied to such a broadband communication environment. In the proposed system, front-end processing modules (FPM), which are independent ATM nodes with the call processing functions, are placed according to the scale of system. The central switching module (CSM) with the single-stage distributed ATM switch to connect FPM is provided only with the self-routing function based on the routing information in the ATM cell header. For the proposed hyperdistributed architecture, the design for the communication channel based on the ATM nonblocking condition, as well as the transfer route determination, are discussed. Then the allocation of the quality class control using the shared buffer ATM switch is discussed which can construct an efficient network satisfying the diversified quality requirements.