A Hybrid Symmetric Cascaded H-Bridge Multilevel Converter Topology

Abstract

This paper presents a hybrid symmetric cascaded multilevel converter capable of generating nearly twice the number of output levels as that generated by a conventional symmetric cascaded H-bridge multi-level converter. In the proposed converter topology, each phase comprises one five-level transistor-clamped H-bridge power cell, and the remaining are three-level H-bridge power cells, with all the power cells having equal cell dc-link voltages. Because of the cascade connection of the power cells with equal dc-link voltages, the H-bridge power cells share equal power and is nearly equal to the power shared by the transistor-clamped power cell. The near-equal power sharing condition further helps in effective suppression of the lower-order harmonics present in the input source current waveform if a suitable phase-shifting transformer is employed at the converter input. In this paper, the operating principle and the modulation strategy for the generalized configuration of the proposed topology is explained in detail. The analysis of the capacitor voltages in transistor-clamped H-bridge power cell and converter power loss calculations are also presented. To investigate the performance of the converter system, detailed simulation studies are carried out and the results are validated through experimental results obtained from nine- and thirteen-level laboratory prototypes.