A Hybrid Scheme Combining Duplications and LDPC Decoding to Reduce NAND Flash

Abstract

Abstract With the development of NAND flash, the storage density has become larger and larger, but the reliability has become lower and lower. To address this problem, stronger error correction codes, low-density parity-check (LDPC) codes, are widely used in flash memory. However, the direct use of LDPC codes for error correction has a great impact on the read and write performance of SSDs. Given this, this paper proposes a new mentality that combines replica and LDPC decoding methods to improve the read performance of solid state drives (SSDs). Considering the characteristics of the quantization level of LDPC soft-decision decoding, this paper proposes the IDSD (LDPC soft-decision decoding and duplication method) and IDHSD (a method combining duplication and LDPC hybrid decoding)schemes. These schemes are mainly for hot data. When reading the data, the IDSD scheme needs to first judge whether it is soft-decision decoding. Then, according to the number of quantization levels recorded, it needs to select whether to use duplication or soft-decision decoding to correct the error data. The IDHSD scheme does not need to judge the soft-decision decoding but directly uses the duplication after the hard-decision decoding fails. Both schemes reduce the average response time to a certain extent and optimize the read performance of the SSD. The experimental results show that compared with the Native Scheme, the average response delay time of the IDSD scheme decreases by 5–30% and the IDHSD scheme slashes by 5–38%. Compared with the Traditional Refresh Scheme, the average response delay time of the IDSD scheme cuts down by 1–30% and the IDHSD scheme lowers by 1–29%.