Abstract

A hybrid architecture of integrated circuits is expectedly able to overcome the serious difficulties encountered in the scaling down of conventional CMOS (complementary metal-oxide-semiconductor) circuits. In this architecture a silicon-based CMOS circuit controls a nanoscopic crossbar structure, in turn hosting at each cross-point a collection of functional molecules able to mimic by themselves the behaviour of a flash memory cell. The hybrid architecture, however, poses several problems: the set-up of an economically sustainable technology for the preparation of 1011 cross-points cm−2; the demultiplexing of the addressing lines to allow their linkage to the microelectronic circuit; the grafting of the functional molecules to those cross-points via batch processing; and the design, synthesis and electrical characterization of the functional molecules, which have been identified as the most important ones. This work is devoted to discussing which practical solutions can be adopted for the large-scale production of hybrid circuits on the 0.1 Tbit integration scale.

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