A High-Speed, Threshold-Voltage-Mismatch Compensation Sense Amplifier for Gb-scale DRAM Arrays

Abstract

A high-speed, small-area DRAM sense amplifier with a threshold-voltage (V T ) mismatch compensation function is proposed. This sense amplifier features a unique hierarchy data-line architecture with a direct sensing scheme which uses only nMOS transistors in the array, and a simple V T mismatch compensation circuitry which uses a pair of nMOS switching transistors. The layout area of the sense amplifier is reduced to 70% of that of conventional common I/O CMOS sense amplifiers due to removing pMOS transistors from the array. The read-out time is improved to 35% that of conventional CMOS sense amplifiers, because of direct sensing and there is a 90% reduction in V T mismatch. This sense amplifier eliminates the sensitivity degradation and the area overhead increase that are expected in future Gb-scale DRAM arrays.