Abstract
A 0.5-μm design rule single-chip public key encryption processor is described and evaluated. This full-custom chip employs the high-speed redundant binary method. A bit-slice processor macro is used as the arithmetic unit. The processor is capable of executing 1024-bit operations in as little as 50 ms. The three main features of this chip are: 1) keys of arbitrary length up to 1024 bits can be used, 2) the data length can be read before the output of the computation result, and 3) for safe handling of RSA cryptosystem private keys, the private key is stored in a register on the chip that cannot be read out. Ordinary personal computers equipped with an expansion board that employs this chip are capable of performing at high speed. The chip can also be mounted on a PC Card [1] by using a TQFP, allowing implementation as a portable personal device. Through the use of such PC boards or cards, this chip promises to play an important role in safer real-time electronic commerce over the Internet in the near future. © 1998 Scripta Technica. Syst Comp Jpn, 29(1): 20–32, 1998
Published Version
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