A High-Speed CMOS Frontend Readout ASIC for Multi-Channel Muon Detectors

Abstract

AbstractA prototype high-speed frontend readout ASIC, designed in 180 nm CMOS process for tracking and precision time-tagging applications in high energy physics experiments, is presented. This ASIC comprises four readout channels, each consisting of a three-stage voltage amplifier, an on-chip analog cable driver and a comparator with LVDS driver. The amplifier and comparator are AC coupled externally. In this ASIC, potential distribution method (PDM) is used to design the high-speed amplifier, cable driver, and comparator stages. This method has proven to be an efficient way of optimizing the target specifications trade-offs. The ASIC exhibited a total voltage gain of ~ 71 and maximum output swing of ~ 600 mV across 50 Ω load for both the input polarities with power consumption of ~ 20 mW/channel. The timing precision of the overall FEE channel is measured to be ~ 530 ps RMS with comparator overdrive of around three times the threshold voltage.KeywordsFrontend electronicsResistive plate chamber detectorPotential distribution method