A high-performance CMOS charge pump for PLLs

Abstract

In conventional CMOS charge pump circuits, there are some non-ideal effects such as the clock feedthrough, current mismatch and charge sharing which result in a phase offset in phase-locked loop circuits. This paper presents a new charge pump to reduce the jitter. The proposed and conventional charge pumps are simulated and compared. The circuit is implemented using a 0.35µm mix-signal CMOS process. And the simulation result is obtained by SPECTRES.