Abstract

A complementary metal oxide semiconductor (CMOS) transconductor based on a high performance unity-gain buffer driving the degeneration resistor was used to obtain a highly linear voltage-to-current conversion with considerable reduction of the supply voltage. Simulations show that the transconductor using an 0.18-μm standard CMOS process with a 1.2-V supply voltage has less than −80 dB total harmonic distortion (THD) for a 1-MHz 0.4-V p-p differential input signal. The third-order intermodulation is less than −63 dB for 0.25 V p-p differential inputs at 1 MHz. The DC power consumption in the transconductor core is 240 μW. This topology is a feasible solution for low voltage and low power applications.

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