A high-voltage floating level shifter for a multi-stage charge-pump in a standard 1.8 V/3.3 V CMOS process

Abstract

This paper proposes a high-voltage floating level shifter with a periodically-refreshed charge pump topology. Designed and fabricated in a standard 1.8 V/3.3 V CMOS process, the circuit can withstand shifting voltages from 3V to 8.5V with a delay response of 1.8ns and occupies 0.008mm2. The proposed circuit has been used in a multi-stage charge pump for programming its voltage conversion ratio. Experimental results show that the level shifters successfully enable/disable the stages of the charge pump, thus modifying its output voltage between 5.35V and 12.4V for an output current of 3 mA.