Abstract

We propose a high performance 3-bit negative edge-triggered ripple counter based on organic thin film transistors (OTFTs). All the logic gate circuits used in this work are inverters and NAND circuits based on OTFTs with large zero-VGS load. A clock signal with the voltage range of 0–30 V and a frequency of 12.5 kHz is used for the ripple counter as a clock input. A high output level of ∼27.4 V and a low output level of ∼4 or 5 V are measured at the 2nd and 3rd stages’ output node of the ripple counter. Their frequencies are one quarter and one eighth of the input signal’s frequency. The output signal of the proposed ripple counter changes when its input signal falls to low level from high.

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