A high-order curvature compensated voltage reference based on lateral BJT

Abstract

This paper presents a curvature compensated voltage reference (VR), which is based on lateral PNP bipolar junction transistor (BJT). The proposed VR is fabricated in 0.18 μm CMOS process. The circuit consists of two first-order current-mode band gap references (BGR) and a subtraction circuit. Temperature characteristics of lateral PNP BJT is utilized for temperature curvature compensation. Moreover, in order to reduce the errors introduced by the conventional subtraction circuit, an improved subtraction circuit is proposed for improving performance of curvature compensation. Test results of prototype chips show the proposed VR has an average 2.36 ppm/° C within temperature range of −40 ° C to 120 °C. Power supply rejection ratio (PSRR) of the proposed VR achieves 69.5 dB at 100 Hz.