A High Linearity 24-GHz Down-Conversion Mixer Using Distributed Derivative Superposition Technique in 0.18- $\mu \text{m}$ CMOS Process

Abstract

This letter presents a 24-GHz down-conversion mixer with built-in linearizer in 0.18-μm CMOS process. The mixer attains -4.5 ± 0.6 dB conversion gain and 23-dBm IIP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> with 5-dBm local-oscillator power by adopting double-balanced Gilbert-cell mixers with a distributed derivative superposition linearizer. The improvement of IIP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> is 9 dB. The dc power consumption of the proposed mixer is 16 mW. This mixer has the best IIP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> compared with other published CMOS mixer in the K-band.