Abstract

This paper presents a high gain, low-power common-gate ultra-wideband low-noise amplifier employing a simple configuration for wideband input matching. In our design, a series resistance-inductance network at the source combines with the parasitic capacitance of a transistor to form a parallel RLC input matching configuration in the common-gate input stage. Because of the additional resistance, this matching configuration partially alleviates the restriction of transconductance of the input transistor and also provides wideband matching. The low-noise amplifier was fabricated using the TSMC 0.18 $$\mu $$ μ m technology with an average noise figure of 3.75 dB, a power gain of 18.68 dB with a ripple of $$\pm $$ ± 0.8 dB, an input return loss less than $$-10$$ - 10 dB from 3 to 7.6 GHz, and DC power consumption of 8.56 mW, including the output buffer with a 1.8 V supply voltage.

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