Abstract
This paper presents a two-stage low-noise ultra-wideband amplifier to obtain the high and smooth gain in 180nm CMOS Technology. The proposed structure has two common source stages with inductive feedback. The first stage is designed for 3GHz frequency and the second stage is designed about 8GHz. In the simulation, symmetric inductors of TSMC 0.18um CMOS technology in ADS software is used. Simulation results show high and relatively smooth S21 equal to 18.674±1.38dB, the noise figure of less than 3.7dB, the power consumption of 14.6mW with 1.2V supply voltage and suitable matching at the input (S11<-10.8dB) in 3.1 to 10.6 GHz frequency range. Moreover, IIP3 of this circuit is -9.5dBm at the 7GHz frequency.
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