Abstract

Dynamic logic is a well-known logic style which is widely used in digital electronics. A mixed dynamic/static full adder cell is presented in this paper with the aim of reaching high efficiency. The midoutputs are obtained from a Multi-output dynamic module. Then, a multiplexer generates final outputs in the static part. Several conventional and state-of-the-art dynamic adders are also surveyed and compared in the paper. All circuits are simulated by HSPICE with 32 nm CNFET technology. The proposed design is the fastest dynamic adder cell. In addition, it has approximately 5% higher efficiency in terms of PDP than the second most high-performance cell, which is DDCVS.

Highlights

  • In today’s VLSI circuit designs, the increasing demand for high-speed and low-power structures can be addressed at different design levels including design methodology and fabrication technology

  • In order to overcome the mentioned problems, some nanoscale devices such as single-electron transistor (SET) [2], quantumdot cellular automata (QCA) [3], and carbon nanotube field effect transistor (CNFET) [4] have recently been presented in the literature to be employed in nanoscale digital electronics

  • Full Adder is known as a fundamental arithmetic block which is widely used in microprocessors, digital signal processors (DSPs), video and image processing units, and micro/nanoelectronic systems

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Summary

Introduction

In today’s VLSI circuit designs, the increasing demand for high-speed and low-power structures can be addressed at different design levels including design methodology and fabrication technology. As the threshold voltage of the CNFET is proportional to the inverse of the diameter of CNT (DCNT ). Design methodologies can be generally categorized as static and dynamic logics. In spite of having high switching activity, dynamic logic has some attractive features They are usually faster than their static counterparts. Full Adder is known as a fundamental arithmetic block which is widely used in microprocessors, digital signal processors (DSPs), video and image processing units, and micro/nanoelectronic systems. It is a basic component for all arithmetic blocks [7]. A novel highly efficient CNFET-based single-bit adder cell is proposed for dynamic logic.

Literature Review on Previously Presented
The Proposed Multi-Output Mixed
Simulation Results and Comparisons
Design
CNFET versus MOSFET
Conclusion
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