Abstract

Thermal interface material (TIM) is applied at the interface between the high-performance microprocessors and heat sink to create a robust heat transfer path. Thermally speaking, TIM is typically characterized by a TIM tester and results are reported in terms of thermal impedance with bond line thickness (BLT) and/or averaged contact pressure. However, the characterization data collected from a TIM tester often cannot represent TIM’s behavior under usage conditions for high-performance microprocessors. The primary reason being the discrepancy in the contact conditions between TIM tester and microprocessor application, mainly including warpage of the microprocessor package and heat sink. In this paper, a Hertzian contact model is proposed to bridge this gap by incorporating in-situ warpage of the microprocessor package and heat sink in usage into the consideration. By applying the model, the thermal resistance of TIM under usage conditions for high performance microprocessors can be estimated from laboratory characterization data. A validation experiment is also presented, and good correlation has been obtained between the prediction and measurement.

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