A heavy ion implanted pocket 0.10 μm n-type metal–oxide–semiconductor field effect transistor with hybrid lithography (electron-beam/deep ultraviolet) and specific gate passivation process

Abstract

We present a 0.10 μm n-type metal–oxide–semiconductor process to achieve devices with reduced short channel effect (SCE) and good current drive capability. Full compatible chemical amplified resist process between deep ultraviolet and electron-beam lithography allowed us to use hybrid lithography at gate level. For the first time, we show that the conventional gate reoxidation is a limiting step to process integration because of the bird’s beak formation at the poly-gate edge. Consequently, this process is replaced by a low thermal oxide deposition. In addition, indium and gallium pocket implantations have been realized to improve the SCE control.