A 0.10 μm NMOSFET, made by hybrid lithography (e-beam/DUV), with Indium pocket and specific gate reoxidation process

Abstract

In this paper, we present a 0.10 μm NMOS process to achieve devices with reduced short channel effect (SCE) and good current drive capability. Full compatible Chemical Amplified Resist (CAR) process between DUV and e-beam lithography allowed us to use hybride lithography at gate level. For the first time, we show that the conventional gate reoxidation is a limiting step to process integration because of the Bird's Beak formation at the poly gate edge. Consequently, this process is replaced by a low thermal oxide deposition. In addition, Indium pocket implantations have been realized to improve the SCE.