Abstract
Currently widespread approaches to implementation of finite state machines in Field Programmable Gate Array circuits consist of separate encoding and mapping steps. This paper presents a graph-based algorithm that implements a symbolic functional decomposition of the FSMs - a method that does not pre-encode the machinepsilas states, but instead encodes them gradually during every step of the functional decomposition process (used for mapping the FSM to the FPGA circuitpsilas LUT cells). The symbolic functional decomposition method guarantees high quality of the final decomposition, with better results than the current two-step approaches.
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